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Behavioral

3 years ago

Share your experience with a notable failure at work and what it taught you.

Design Verification Engineer

Cisco Systems

Safran

IBM

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3 years ago

Technical

3 years ago

What makes a FinFET different from a traditional MOSFET?

Design Verification Engineer

Cisco Systems

Zoox

Synopsys

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3 years ago

Behavioral

3 years ago

What unique aspect of your personality or background might not be evident from your resume?

Design Verification EngineerEmbedded Engineer

Cisco Systems

Magneti Marelli

Lumentum

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3 years ago

Technical

3 years ago

What's your methodology for creating a test plan in a design verification context?

Design Verification Engineer

Cisco Systems

Yamaha Motor Corporation

AIRBUS

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3 years ago

Verilog Coding

3 years ago

Could you draft a constraint for creating 4 distinct variables?

Design Verification Engineer

Cisco Systems

SK Hynix

Sumitomo Electric

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3 years ago

Design

3 years ago

In VLSI design, how crucial is a clock tree and what does it accomplish?

Design Verification Engineer

Cisco Systems

AT&T

SK Hynix

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3 years ago

Verilog Coding

3 years ago

What does 'out' become when 'a' is assigned “1’bx”?

Design Verification Engineer

Cisco Systems

Eaton

Safran

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3 years ago

Verilog Coding

3 years ago

Describe how rand differs from randc in SystemVerilog, providing an example for each.

Design Verification Engineer

Cisco Systems

STMicroelectronics

Panasonic

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3 years ago

Circuits

3 years ago

Can you describe the output waveform of a pulse generator using a NAND gate and input delays, in relation to the given input timing?

Design Verification Engineer

Cisco Systems

Lattice Semiconductor

Thermo Fisher Scientific

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3 years ago

Circuits

3 years ago

Define the characteristics of a memory array, describe what a sense amplifier does, and explain an equilibration circuit's function.

Design Verification Engineer

Cisco Systems

Cisco

Bosch

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3 years ago

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