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Design
3 years ago
In VLSI design, how would you differentiate between delay and slew rate?
Design Verification Engineer

Cisco Systems

Sony

Northrop Grumman

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3 years ago
Behavioral
3 years ago
What metrics would you use to define success?
Design Verification EngineerEmbedded Engineer

Cisco Systems

Amazon

Synopsys

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3 years ago
Verilog Coding
3 years ago
In your interpretation, what is the significance of "wire #10 a = b & c"?
Design Verification Engineer

Cisco Systems

Fujikura Logo

Fujikura

BAE Systems Logo

BAE Systems

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3 years ago
Technical
3 years ago
Can you describe the role of Karnaugh maps in the simplification of Boolean expressions?
Design Verification Engineer

Cisco Systems

Agilent Technologies Logo

Agilent Technologies

Lam Research Logo

Lam Research

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3 years ago
Circuits
3 years ago
How would you construct an algorithm using just write(addr, data) and read(addr, &data) APIs to find a shorted internal signal, given no access to the signals themselves?
Design Verification Engineer

Cisco Systems

Legrand Logo

Legrand

Applied Materials Logo

Applied Materials

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3 years ago
Verilog Coding
3 years ago
How would you script an SVA in System Verilog to confirm a FIFO's emptiness prior to executing a read operation?
Design Verification Engineer

Cisco Systems

Huawei Logo

Huawei

Autodesk Logo

Autodesk

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3 years ago
Algorithms
3 years ago
Can you describe the process to verify if a string is a palindrome?
Design Verification Engineer

Cisco Systems

Thales Logo

Thales

Huawei Logo

Huawei

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3 years ago
Behavioral
3 years ago
Can you describe a situation where you were in charge of a team? What was the outcome?
Design Verification Engineer

Cisco Systems

ON Semiconductor Logo

ON Semiconductor

Waymo Logo

Waymo

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3 years ago
Design
3 years ago
How would you explain the critical path in digital design and your strategy for optimizing it?
Design Verification Engineer

Cisco Systems

Bombardier Logo

Bombardier

Silicon Labs Logo

Silicon Labs

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3 years ago
Technical
3 years ago
Can you differentiate between the 'new' and 'create' methods in UVM?
Design Verification Engineer

Cisco Systems

Fujitsu Logo

Fujitsu

GlobalFoundries Logo

GlobalFoundries

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3 years ago

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*All interview questions are submitted by recent Cisco Systems Design Verification Engineer candidates, labelled and categorized by Prepfully, and then published after being verified by Design Verification Engineers at Cisco Systems.

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