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Circuits
8 months ago
How do the voltages of two capacitors, charged differently and connected in parallel by a transistor, behave when the transistor is switched on?
Design Verification Engineer

Western Digital

Dialog Semiconductor

Kingston Technology

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8 months ago
Technical
9 months ago
In your experience, how do reg, logic, and wire vary in System Verilog?
Design Verification Engineer

Western Digital

Johnson Controls Logo

Johnson Controls

MediaTek Logo

MediaTek

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9 months ago
Technical
9 months ago
How would you describe the communication protocol between a UVM agent and a UVM sequencer?
Design Verification Engineer

Western Digital

Microchip Technology Logo

Microchip Technology

Arm Logo

Arm

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9 months ago
Algorithms
9 months ago
How does the Tomasulo Algorithm outperform other scheduling methods? Do you have experience using it? Could you detail an example of your implementation and its hazard management?
Design Verification Engineer

Western Digital

Cisco Systems Logo

Cisco Systems

Bosch Logo

Bosch

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9 months ago
Verilog Coding
9 months ago
In System Verilog, how do you create an SVA to check that an input signal meets setup and hold time requirements?
Design Verification Engineer

Western Digital

Mayo Clinic Logo

Mayo Clinic

Qualcomm Logo

Qualcomm

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9 months ago
Circuits
10 months ago
What are the key phases in UVM, and how are they triggered?
Design Verification Engineer

Western Digital

KLA Logo

KLA

Polaris Industries Logo

Polaris Industries

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10 months ago
Circuits
10 months ago
In what way would you establish the depth of a FIFO?
Design Verification Engineer

Western Digital

KLA Logo

KLA

BMW Group Logo

BMW Group

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10 months ago
Verilog Coding
10 months ago
Outline your approach for developing a binary to thermometer decoder in Verilog.
Design Verification Engineer

Western Digital

Bosch Logo

Bosch

Fujikura Logo

Fujikura

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10 months ago
Computer Architecture
10 months ago
How would you define VLSI and its major applications?
Design Verification Engineer

Western Digital

Microchip Technology Logo

Microchip Technology

Kingston Technology

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10 months ago
Technical
10 months ago
How do assertions function in verification, and why are they crucial?
Design Verification Engineer

Western Digital

SK Hynix Logo

SK Hynix

Vivo Logo

Vivo

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10 months ago

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*All interview questions are submitted by recent Western Digital Design Verification Engineer candidates, labelled and categorized by Prepfully, and then published after being verified by Design Verification Engineers at Western Digital.

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