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Chip Design
2 years ago
Devise different types of counters, for instance, a mod-15 counter that avoids 0, 3, 4, 8, and 5.
Design Verification Engineer

Volkswagen

Nuro Logo

Nuro

GlobalFoundries Logo

GlobalFoundries

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2 years ago
Technical
2 years ago
How do various types of memory contribute to digital design?
Design Verification Engineer

Volkswagen

Novartis Logo

Novartis

Xiaomi Logo

Xiaomi

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2 years ago
Verilog Coding
2 years ago
In System Verilog, what's your technique for ensuring through an SVA that transactions don't initiate while the reset is active?
Design Verification Engineer

Volkswagen

ASUS Logo

ASUS

NVIDIA Logo

NVIDIA

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2 years ago
Circuits
2 years ago
Can you determine the output frequency of a JK flip-flop given J=K=0 and a 10MHz clock input?
Design Verification Engineer

Volkswagen

Western Digital Logo

Western Digital

Alstom Logo

Alstom

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2 years ago
DesignCircuits
2 years ago
Could you outline a circuit design for checking if a number is divisible by three?
Design Verification Engineer

Volkswagen

Beckman Coulter Logo

Beckman Coulter

ASUS Logo

ASUS

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2 years ago
Circuits
2 years ago
Can you detail the phases in UVM and describe the process of starting each?
Design Verification Engineer

Volkswagen

KLA Logo

KLA

Polaris Industries Logo

Polaris Industries

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2 years ago
Technical
2 years ago
Could you describe the nature and purpose of a virtual class in SystemVerilog?
Design Verification Engineer

Volkswagen

NETGEAR Logo

NETGEAR

Acer Logo

Acer

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2 years ago
Verilog Coding
2 years ago
Can you demonstrate how to construct a System Verilog Assertion that validates a signal's shift from 0 to 1 occurs before a different signal changes from 1 to 0?
Design Verification Engineer

Volkswagen

Kawasaki Heavy Industries Logo

Kawasaki Heavy Industries

Philips Healthcare Logo

Philips Healthcare

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2 years ago
Technical
2 years ago
Can you discuss the objection mechanism in UVM and the methodology to wrap up a test?
Design Verification Engineer

Volkswagen

Bosch Logo

Bosch

Tesla Logo

Tesla

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2 years ago
Verilog Coding
2 years ago
Outline your strategy for creating a 32-word 2R1W RF with programmable bitwidth.
Design Verification Engineer

Volkswagen

Sumitomo Electric Logo

Sumitomo Electric

Waymo Logo

Waymo

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2 years ago

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*All interview questions are submitted by recent Volkswagen candidates, labelled and categorized by Prepfully, and then published after verification by current and ex-Volkswagen employees.

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