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Circuits

2 years ago

What method would you use to ascertain the depth of a FIFO?

Design Verification Engineer

Sony

KLA

BMW Group

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2 years ago

Design

2 years ago

In terms of digital design, how do you understand and enhance a critical path?

Design Verification Engineer

Lockheed Martin

Bombardier

Silicon Labs

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2 years ago

Circuits

2 years ago

How is the output of a pulse generator with a 2-input NAND gate and input delays from inverters influenced by the input timing diagram?

Design Verification Engineer

Microsoft

Acer

Lattice Semiconductor

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2 years ago

Algorithms

2 years ago

What are Perl's key advantages over its scripting language counterparts?

Design Verification Engineer

Meta

Prysmian Group

FLIR Systems

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2 years ago

Technical

2 years ago

What techniques would you use to overcome setup and hold time violations?

Design Verification Engineer

Amazon

Boeing

Yamaha Motor Corporation

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2 years ago

Behavioral

2 years ago

Recollect a scenario where your decision-making process led to an undesirable outcome. What understanding did you develop from this event?

Design Verification EngineerEmbedded Engineer

Amazon

Google

ABB

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2 years ago

Verilog Coding

2 years ago

How do you plan to execute the implementation of a binary to thermometer decoder in Verilog?

Design Verification Engineer

Bosch

Fujikura

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2 years ago

Behavioral

2 years ago

Reflect on a moment you aided a colleague in a task not part of your job description. How did it turn out?

Design Verification EngineerEmbedded Engineer

Google

Amazon

Microsoft

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2 years ago

Circuits

2 years ago

Why are D-flipflops and similar devices usually built with NAND gates instead of NOR gates?

Design Verification Engineer

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^*All interview questions are submitted by recent Design Verification Engineer candidates, labelled and categorized by Prepfully, and then published after verification by current and ex-Design Verification Engineer employees.