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Verilog Coding
a year ago
In what manner would you draft HDL code for a FSM encompassing IDLE, READ, and WRITE, with state changes based on "op" and a 4-cycle reset to IDLE?
Design Verification Engineer

Marvell

NXP Semiconductors

NVIDIA

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a year ago
Algorithms
a year ago
Could you illustrate coding a Least Recently Used (LRU) cache policy in C++?
Design Verification Engineer

Marvell

Fujitsu Logo

Fujitsu

Tesla Logo

Tesla

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a year ago
Technical
a year ago
What are the functional differences between the 'new' and 'create' methods in UVM?
Design Verification Engineer

Marvell

Fujitsu Logo

Fujitsu

GlobalFoundries Logo

GlobalFoundries

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a year ago
Technical
a year ago
How familiar are you with using Verilog in both design and verification contexts? Can you give an example of a relevant project?
Design Verification Engineer

Marvell

Dell Logo

Dell

Philips Healthcare Logo

Philips Healthcare

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a year ago
Technical
a year ago
Can you describe the process you follow for a test plan in design verification?
Design Verification Engineer

Marvell

Yamaha Motor Corporation Logo

Yamaha Motor Corporation

AIRBUS Logo

AIRBUS

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a year ago
Technical
a year ago
How does time factor into simulations in Verilog?
Design Verification Engineer

Marvell

Cadence Design Systems Logo

Cadence Design Systems

Ford Motor Company Logo

Ford Motor Company

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a year ago
Algorithms
a year ago
What makes Perl advantageous when compared to alternative scripting languages?
Design Verification Engineer

Marvell

Prysmian Group Logo

Prysmian Group

FLIR Systems Logo

FLIR Systems

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a year ago
Technical
a year ago
Can you discuss the objection mechanism in UVM and the methodology to wrap up a test?
Design Verification Engineer

Marvell

Bosch Logo

Bosch

Tesla Logo

Tesla

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a year ago
Behavioral
a year ago
Discuss an instance of an unsuccessful decision in your career. What knowledge did this experience impart?
Design Verification EngineerEmbedded Engineer

Marvell

NetApp Logo

NetApp

Ansys Logo

Ansys

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a year ago
Design
a year ago
What is your level of expertise with the Ethernet protocol, and could you discuss its main features and components?
Design Verification Engineer

Marvell

BMW Group Logo

BMW Group

Rockwell Automation Logo

Rockwell Automation

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a year ago

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