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Behavioral
a year ago
Describe a situation where your choice didn't work as planned. What did this teach you?
Design Verification EngineerEmbedded Engineer
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Eaton

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NetApp

Marvell Logo

Marvell

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a year ago
Technical
a year ago
In your understanding, what constitutes a Testbench?
Design Verification Engineer
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Eaton

Broadcom Logo

Broadcom

Philips Healthcare Logo

Philips Healthcare

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a year ago
Verilog Coding
a year ago
What method would you employ to create an SVA in System Verilog that stops transactions from starting during an active reset?
Design Verification Engineer
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Eaton

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ASUS

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NVIDIA

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a year ago
Design
a year ago
Could you enumerate the different kinds of adders in VLSI design? How do you fine-tune these adders for various applications?
Design Verification Engineer
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Eaton

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National Instruments

Emerson Electric Logo

Emerson Electric

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a year ago
CircuitsDesign
a year ago
What's your approach to circuit design involving adders and gates, and what aspects do you emphasize?
Design Verification Engineer
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Eaton

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Amgen

ASUS Logo

ASUS

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a year ago
Circuits
a year ago
How would you go about creating a NAND gate solely with 2:1 MUXes?
Design Verification Engineer
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Eaton

GlobalFoundries Logo

GlobalFoundries

Bombardier Transportation Logo

Bombardier Transportation

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a year ago
Circuits
a year ago
What frequency can be expected at the output of a JK flip-flop with J=K=0 and a clock frequency of 10MHz?
Design Verification Engineer
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Eaton

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Western Digital

Alstom Logo

Alstom

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a year ago
Design
a year ago
What is your level of expertise with the Ethernet protocol, and could you discuss its main features and components?
Design Verification Engineer
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Eaton

BMW Group Logo

BMW Group

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Rockwell Automation

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a year ago
Verilog Coding
a year ago
In System Verilog, how do you create an SVA to check that an input signal meets setup and hold time requirements?
Design Verification Engineer
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Eaton

Mayo Clinic Logo

Mayo Clinic

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Qualcomm

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a year ago
Technical
a year ago
Can you describe how Immediate and Concurrent Assertions differ in SystemVerilog?
Design Verification Engineer
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Eaton

Skyworks Solutions Logo

Skyworks Solutions

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Dell Technologies

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a year ago

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