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Behavioral

6 months ago

Explain a moment where you had to take charge of a team.

Design Verification EngineerEmbedded Engineer

Cisco Systems

Meta

Arista Networks

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6 months ago

Design

6 months ago

Can you explain your process for black box verification and test plan creation?

Design Verification Engineer

Cisco Systems

Fujitsu

Sony

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6 months ago

Behavioral

6 months ago

Explain a circumstance where you had to make an unconventional choice.

Design Verification EngineerEmbedded Engineer

Cisco Systems

Magneti Marelli

Kawasaki Robotics

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6 months ago

Technical

7 months ago

What does the term 'event' mean in Verilog?

Design Verification Engineer

Cisco Systems

Renesas Electronics

FLIR Systems

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7 months ago

Technical

7 months ago

How would you describe the function of an assertion in SystemVerilog during design verification?

Design Verification Engineer

Cisco Systems

AT&T

Mayo Clinic

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7 months ago

Technical

7 months ago

What kinds of timing violations are typically seen in RTL designs?

Design Verification Engineer

Cisco Systems

GlobalFoundries

Yokogawa Electric

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7 months ago

Technical

8 months ago

Please elaborate on the objection mechanism in UVM and the process to terminate a test.

Design Verification Engineer

Cisco Systems

Autodesk

Panasonic

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8 months ago

Verilog Coding

8 months ago

Could you draft assertions for identifying 2's powers?

Design Verification Engineer

Cisco Systems

Triumph Motorcycles

Juul Labs

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8 months ago

Technical

8 months ago

Why have mailboxes been selected for communication between TB components rather than queues?

Design Verification Engineer

Cisco Systems

Abbott Laboratories

Mentor Graphics

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8 months ago

Behavioral

9 months ago

Highlight a moment when your decision did not bring the desired results. What key takeaways did you gather from this?

Design Verification EngineerEmbedded Engineer

Cisco Systems

MediaTek

Schneider Electric

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9 months ago

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^*All interview questions are submitted by recent Cisco Systems Design Verification Engineer candidates, labelled and categorized by Prepfully, and then published after being verified by Design Verification Engineers at Cisco Systems.

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