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Can you enumerate the pins in a TAP interface of a JTAG boundary scan and their count?

Cadence Design Systems

Belkin

Hitachi

3 years ago

How do you tackle debugging when faced with numerous bugs? Can you outline your method?

Cadence Design Systems

Synopsys

Apple

3 years ago

In your own words, what are cache coherence protocols and why are they important?

Cadence Design Systems

Cruise

Xiaomi

3 years ago

Can you describe the distinct roles of a fork and a join in a multithreaded setup?

Cadence Design Systems

Philips Healthcare

Cruise

3 years ago

What separates soft constraints from hard constraints in SystemVerilog, in your view?

Cadence Design Systems

Canon

Microchip Technology

3 years ago

Design

What's your knowledge of the different adders used in VLSI design? How do you tailor these adders for specific applications?

Cadence Design Systems

National Instruments

Emerson Electric

3 years ago

Behavioral

Describe a scenario where you disagreed with a higher authority at work.

Design Verification EngineerEmbedded Engineer

Cadence Design Systems

Rohde & Schwarz

BAE Systems

3 years ago

Circuits

Can you describe the distinctions between positive and negative edge-triggered flip-flops?

Cadence Design Systems

Xilinx

Peloton

3 years ago

Can you distinguish between reg, logic, and wire datatypes in System Verilog?

Cadence Design Systems

Johnson Controls

MediaTek

3 years ago

How would you describe the testbench you developed for a certain project?

Cadence Design Systems

Google

Juul Labs