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Behavioral
a year ago
Share your learnings from a significant failure you've experienced in your professional life.
Design Verification Engineer

Verizon

Safran

IBM

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a year ago
Verilog Coding
2 years ago
How do you design an SVA in System Verilog to check a FIFO's emptiness before performing a read operation?
Design Verification Engineer

Verizon

Huawei Logo

Huawei

Autodesk Logo

Autodesk

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2 years ago
Design
2 years ago
Can you clarify how cache memories and controllers work? What approaches do you take for cache optimization and access time reduction?
Design Verification Engineer

Verizon

Belkin Logo

Belkin

Aurora Logo

Aurora

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2 years ago
Verilog Coding
2 years ago
What steps would you take to develop a module that produces the dot product of A and B?
Design Verification Engineer

Verizon

Bombardier Logo

Bombardier

Apple Logo

Apple

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2 years ago
Technical
2 years ago
Could you elaborate on your hands-on experience with UVM and System Verilog?
Design Verification Engineer

Verizon

Peloton Logo

Peloton

Amazon Logo

Amazon

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2 years ago
Verilog Coding
2 years ago
How do you write a Verilog code to zero-fill a 10x9 array at 0ns in an initial block?
Design Verification Engineer

Verizon

Beckman Coulter Logo

Beckman Coulter

Bombardier Transportation Logo

Bombardier Transportation

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2 years ago
Verilog Coding
2 years ago
How would you engineer a binary to thermometer decoder in the Verilog environment?
Design Verification Engineer

Verizon

Bosch Logo

Bosch

Fujikura Logo

Fujikura

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2 years ago
Technical
2 years ago
What are the key elements of scan chains?
Design Verification Engineer

Verizon

ABB Logo

ABB

Keysight Technologies Logo

Keysight Technologies

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2 years ago
Design
2 years ago
Could you describe the violations that are often faced and how you work to avoid them?
Design Verification Engineer

Verizon

Mentor Graphics Logo

Mentor Graphics

Sharp Logo

Sharp

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2 years ago
Design
2 years ago
Can you outline the various adders found in VLSI design? How do you enhance these adders for different application needs?
Design Verification Engineer

Verizon

National Instruments Logo

National Instruments

Emerson Electric Logo

Emerson Electric

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2 years ago

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*All interview questions are submitted by recent Verizon Design Verification Engineer candidates, labelled and categorized by Prepfully, and then published after being verified by Design Verification Engineers at Verizon.

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