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Technical
a year ago
Can you explain the concept and importance of cache coherence protocols?
Design Verification Engineer

Apple

KTM AG

Cruise

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a year ago
Verilog Coding
a year ago
How do you envision coding a HDL FSM with IDLE, READ, WRITE states, changing states on "op" input and returning to IDLE after 4 clock cycles?
Design Verification Engineer

Hitachi

NXP Semiconductors

NVIDIA

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a year ago
Circuits
a year ago
How would you define a Linear Feedback Shift Register (LFSR)?
Design Verification Engineer
Juul Labs Logo

Juul Labs

Emerson Electric Logo

Emerson Electric

ABB Logo

ABB

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a year ago
Technical
a year ago
How would you describe the communication protocol between a UVM agent and a UVM sequencer?
Design Verification Engineer
Belkin Logo

Belkin

Microchip Technology Logo

Microchip Technology

Arm Logo

Arm

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a year ago
Circuits
a year ago
How would you go about creating a NAND gate solely with 2:1 MUXes?
Design Verification Engineer
Microsoft Logo

Microsoft

Novartis Logo

Novartis

GlobalFoundries Logo

GlobalFoundries

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a year ago
Behavioral
a year ago
In what ways do you excel over others for this Design Verification Engineer position?
Design Verification Engineer
Amazon Logo

Amazon

Apple

Palo Alto Networks Logo

Palo Alto Networks

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a year ago
Behavioral
a year ago
Discuss how you change your communication approach for maximum effectiveness.
Design Verification EngineerEmbedded Engineer
Oracle Logo

Oracle

BAE Systems Logo

BAE Systems

Microchip Technology Logo

Microchip Technology

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a year ago
Circuits
a year ago
Can you detail the function of a multiplexer, along with a circuit diagram for reference?
Design Verification Engineer
Amazon Logo

Amazon

Skyworks Solutions Logo

Skyworks Solutions

FLIR Systems Logo

FLIR Systems

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a year ago
Algorithms
a year ago
Can you script a program that inverses the order of a linked list?
Design Verification Engineer
Silicon Labs Logo

Silicon Labs

Intel Logo

Intel

IBM Logo

IBM

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a year ago
Technical
a year ago
Could you share an example of a coverage point from your verification environment and explain how you ensured coverage?
Design Verification Engineer
Palo Alto Networks Logo

Palo Alto Networks

Northrop Grumman Logo

Northrop Grumman

Prysmian Group Logo

Prysmian Group

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a year ago

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Amazon logo

Amazon

Design Verification Engineer

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Behavioral
Google logo

Google

Design Verification Engineer

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Behavioral
Meta logo

Meta

Design Verification Engineer

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Behavioral

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*All interview questions are submitted by recent Design Verification Engineer candidates, labelled and categorized by Prepfully, and then published after verification by current and ex-Design Verification Engineer employees.

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