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Technical
2 years ago
How do the # directive and the $timeformat directive in Verilog differ?
Design Verification Engineer

Adobe

Aurora

General Electric

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2 years ago
Algorithms
2 years ago
How do you formulate a Fibonacci series in C++?
Design Verification Engineer

Apple

Palo Alto Networks

Triumph Motorcycles

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2 years ago
Technical
2 years ago
How does a virtual interface add value in SV?
Design Verification Engineer
Amazon Logo

Amazon

Rockwell Automation Logo

Rockwell Automation

General Electric

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2 years ago
Behavioral
2 years ago
Describe a situation where your choice didn't work as planned. What did this teach you?
Design Verification EngineerEmbedded Engineer
Amazon Logo

Amazon

Google Logo

Google

Novartis Logo

Novartis

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2 years ago
Technical
2 years ago
What makes UVM a preferred method in design verification?
Design Verification Engineer
Microsoft Logo

Microsoft

ON Semiconductor Logo

ON Semiconductor

Xilinx Logo

Xilinx

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2 years ago
Technical
2 years ago
In your view, how do positive and negative edge triggers in Verilog differ?
Design Verification Engineer
Rolls-Royce Holdings Logo

Rolls-Royce Holdings

Boston Scientific Logo

Boston Scientific

Teradyne Logo

Teradyne

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2 years ago
Design
2 years ago
What is your approach to developing a 3 bit shift register using verilog RTL?
Design Verification Engineer

Palo Alto Networks

Nokia Logo

Nokia

NETGEAR Logo

NETGEAR

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2 years ago
Design
2 years ago
In your understanding, how do single and multi-port SRAM/DRAM memories operate? What are your approaches to ensuring memory is used efficiently and access time is kept to a minimum?
Design Verification Engineer
Texas Instruments Logo

Texas Instruments

Harley-Davidson Logo

Harley-Davidson

ASUS Logo

ASUS

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2 years ago
Technical
2 years ago
How do you plan to tackle a bug that's been reported by the verification team?
Design Verification Engineer

Apple

Cypress Semiconductor Logo

Cypress Semiconductor

Cirrus Logic Logo

Cirrus Logic

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2 years ago
Computer Architecture
2 years ago
How would you differentiate a bus from a crossbar in the context of computer architecture?
Design Verification Engineer
Google Logo

Google

Nokia Logo

Nokia

Dell Logo

Dell

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2 years ago

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Amazon logo

Amazon

Design Verification Engineer

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Behavioral
Google logo

Google

Design Verification Engineer

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Behavioral
Meta logo

Meta

Design Verification Engineer

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Behavioral

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*All interview questions are submitted by recent Design Verification Engineer candidates, labelled and categorized by Prepfully, and then published after verification by current and ex-Design Verification Engineer employees.

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