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Technical
2 years ago
Can you explain the workings of a single-channel DMA controller? Also, how does it manage multiple parallel channels and peripherals?
Design Verification Engineer

Marvell

Sony

KTM AG

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2 years ago
Technical
2 years ago
In what ways do Karnaugh maps assist in the simplification of Boolean expressions?
Design Verification Engineer

Juniper Networks

Agilent Technologies

Lam Research

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2 years ago
Technical
2 years ago
How will you assess the performance of this ALU black box? What are your plans for upgrading it to a superscalar or pipelined architecture for enhanced efficiency?
Design Verification Engineer
Taiwan Semiconductor Logo

Taiwan Semiconductor

Micron Technology Logo

Micron Technology

Mentor Graphics Logo

Mentor Graphics

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2 years ago
Design
2 years ago
Please describe the workings of single port and multi-port SRAM/DRAM. What methods do you employ for optimal memory utilization and swift access times?
Design Verification Engineer
Analog Devices Logo

Analog Devices

Harley-Davidson Logo

Harley-Davidson

ASUS Logo

ASUS

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2 years ago
Technical
2 years ago
What's Verilog's method for handling time in simulation environments?
Design Verification Engineer
Meta Logo

Meta

Taiwan Semiconductor Logo

Taiwan Semiconductor

Cadence Design Systems Logo

Cadence Design Systems

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2 years ago
Technical
2 years ago
How would you differentiate between a module-based Testbench and a class-based Testbench?
Design Verification Engineer
Hewlett Packard Logo

Hewlett Packard

Ford Motor Company Logo

Ford Motor Company

IBM Logo

IBM

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2 years ago
Verilog Coding
2 years ago
How would you create assertions to detect numbers that are powers of two?
Design Verification Engineer
Waymo Logo

Waymo

IBM Logo

IBM

Peloton Logo

Peloton

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2 years ago
Behavioral
2 years ago
What strategies do you use to manage your current workload?
Design Verification EngineerEmbedded Engineer
Palo Alto Networks Logo

Palo Alto Networks

Trimble Logo

Trimble

Pratt & Whitney Logo

Pratt & Whitney

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2 years ago
Computer Architecture
2 years ago
What are the fundamental differences between a bus and a crossbar in computing systems?
Design Verification Engineer
Google Logo

Google

Bombardier Transportation Logo

Bombardier Transportation

Dell Logo

Dell

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2 years ago
Behavioral
2 years ago
Discuss a situation where meeting a deadline was challenging for you.
Design Verification Engineer
Autodesk Logo

Autodesk

Aurora Logo

Aurora

Oracle Logo

Oracle

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2 years ago

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Amazon logo

Amazon

Design Verification Engineer

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Behavioral
Google logo

Google

Design Verification Engineer

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Behavioral
Meta logo

Meta

Design Verification Engineer

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Behavioral

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*All interview questions are submitted by recent Design Verification Engineer candidates, labelled and categorized by Prepfully, and then published after verification by current and ex-Design Verification Engineer employees.

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