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Combinational circuit : 

1. Value is assigned immediately

2. Wire can be used and not reg.

3. Logic data type can be used

4. Mostly creates wires or latches

Sequential : 

1. Always dependent on clock

2. Wire cannot be used

3. Reg/logic can be used

4. Creates flip-flops

The logic behind this statement is a is true if b and c are both true, so it is an AND gate

Let us first try to understand what is LRU (Least Recently Used) policy in cache replacement while the explanation also covers how i would implement it.

LRU is basically a small counter per block in a cache set.

To implement it there are two scenarios:

1. Cache hit:

If the access hits the cache ,increment the counters for the blocks whose counters are less than the referenced blocks counter and set the referenced blocks counter to zero.

2. Cache miss:

If the access misses in the cache,replace the Least Recently used Block and set the newly allocated block counter to zero. Increment the counters of other blocks.

f the transistor is activated (turned ON) to connect the two capacitors, the voltages across the capacitors will tend to equalize over time. The capacitor with the higher voltage will discharge into the capacitor with the lower voltage until their voltages become equal.