Your AI Wingman for your next interview

The most comprehensive bank Interview Answer Review tooling available online.

Cutting-edge AI technology meets personalized feedback. Improve your interview answers with insightful guidance provided by a model trained against more than a million human-labelled interview answers.

Company rubrics
Role-level optimisations
Trained on 1mil+ answers

Circuits

2 years ago

Could you detail the steps to make a NAND gate using only 2:1 MUXes?

Design Verification Engineer

ON Semiconductor

GlobalFoundries

Bombardier Transportation

Get answer reviewed by AI

2 years ago

Embedded CodingTechnical Knowledge

2 years ago

What are some prevalent challenges with interrupt handling?

Embedded Engineer

ON Semiconductor

Waymo

Valeo

Get answer reviewed by AI

2 years ago

Computer Architecture

2 years ago

What distinguishes a bus from a crossbar in computer architecture?

Design Verification Engineer

ON Semiconductor

Dell

Western Digital

Get answer reviewed by AI

2 years ago

Behavioral

2 years ago

Narrate an experience where you and a senior leader did not see eye to eye.

Embedded EngineerDesign Verification Engineer

ON Semiconductor

Rohde & Schwarz

BAE Systems

Get answer reviewed by AI

2 years ago

Verilog Coding

2 years ago

Can you expound on the unique features of rand versus randc in SystemVerilog, with examples?

Design Verification Engineer

ON Semiconductor

STMicroelectronics

Panasonic

Get answer reviewed by AI

2 years ago

Technical

2 years ago

Can you provide an overview of Transaction-level modeling in UVM?

Design Verification Engineer

ON Semiconductor

Juniper Networks

Volkswagen

Get answer reviewed by AI

2 years ago

Technical

2 years ago

Please define a FinFET and contrast it with a standard MOSFET.

Design Verification Engineer

ON Semiconductor

Zoox

Synopsys

Get answer reviewed by AI

2 years ago

Behavioral

2 years ago

What techniques do you apply to vary your communication styles for optimal impact?

Embedded EngineerDesign Verification Engineer

ON Semiconductor

BAE Systems

Microchip Technology

Get answer reviewed by AI

2 years ago

Technical

2 years ago

Could you clarify what is meant by setup time and hold time, detail how their violations can happen, and propose ways to decrease these occurrences?

Design Verification Engineer

ON Semiconductor

Embraer

Amazon

Get answer reviewed by AI

2 years ago

Technical Knowledge

2 years ago

Could you outline your method for implementing a round-robin scheduler in RTOS?

Embedded Engineer

ON Semiconductor

Tesla

Yaskawa Electric

Get answer reviewed by AI

2 years ago

Try Free AI Interview

Question of the week

We'll send you a weekly question to practice for:

Showing 111 to 120 of 281 results

^*All interview questions are submitted by recent ON Semiconductor candidates, labelled and categorized by Prepfully, and then published after verification by current and ex-ON Semiconductor employees.