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Behavioral

a year ago

Recall a moment when you were pressed for time to meet a deadline. How did you cope?

Design Verification Engineer

AIRBUS

Aurora

Oracle

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a year ago

Verilog Coding

a year ago

How would you compose an SVA in System Verilog to verify an input signal adheres to setup and hold time constraints?

Design Verification Engineer

AIRBUS

Mayo Clinic

Qualcomm

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a year ago

Behavioral

a year ago

Reflect on a time when you had to make a choice that wasn't widely supported.

Design Verification EngineerEmbedded Engineer

AIRBUS

Philips Healthcare

NetApp

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a year ago

Circuits

a year ago

How do you define a shift register and its mechanism, supported by a circuit representation?

Design Verification Engineer

AIRBUS

OMRON

Canon

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a year ago

Algorithms

a year ago

How does Perl stand out from other scripting languages?

Design Verification Engineer

AIRBUS

Prysmian Group

FLIR Systems

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a year ago

Behavioral

a year ago

What's your process for building a foundation of trust in a team?

Design Verification EngineerEmbedded Engineer

AIRBUS

GlobalFoundries

Fujitsu

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a year ago

Technical

a year ago

Could you walk us through the verification environment for Ethernet MAC IP and each of its components?

Design Verification Engineer

AIRBUS

Apple

ASML

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a year ago

Behavioral

a year ago

Can you describe a major failure in your career and how it shaped your learning?

Design Verification EngineerEmbedded Engineer

AIRBUS

AT&T

Apple

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a year ago

Technical

a year ago

Could you explain the different timing violations that might occur in RTL designs?

Design Verification Engineer

AIRBUS

Qualcomm

Acer

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a year ago

Verilog Coding

a year ago

How is a behavioral model constructed in Verilog? Could you detail the process?

Design Verification Engineer

AIRBUS

Philips

Peloton

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a year ago

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^*All interview questions are submitted by recent AIRBUS candidates, labelled and categorized by Prepfully, and then published after verification by current and ex-AIRBUS employees.