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Technical
4 years ago
What are the key aspects of polymorphism in SystemVerilog, in your view?
Design Verification Engineer
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Verizon

MediaTek Logo

MediaTek

Samsung Logo

Samsung

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4 years ago
Design
4 years ago
Can you break down the operation of single port and multi-port SRAM/DRAM? How do you achieve efficient memory use and quick access?
Design Verification Engineer
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Verizon

Harley-Davidson Logo

Harley-Davidson

ASUS Logo

ASUS

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4 years ago
Behavioral
4 years ago
Would you mind discussing a time when you had to deal with criticism or tough feedback?
Design Verification EngineerEmbedded Engineer
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Verizon

AT&T Logo

AT&T

Magneti Marelli Logo

Magneti Marelli

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4 years ago
Algorithms
4 years ago
In C++, how would you implement an LRU policy for managing cache memory?
Design Verification Engineer
Verizon Logo

Verizon

Fujitsu Logo

Fujitsu

Tesla Logo

Tesla

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4 years ago
Technical
4 years ago
I'd like to understand your process for IP verification. If a new IP is added to your design, how do you check its validity?
Design Verification Engineer
Verizon Logo

Verizon

Aurora Logo

Aurora

Sharp Logo

Sharp

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4 years ago
Circuits
4 years ago
Could you provide a graphical representation of the IDD of an inverter as it goes from OFF to ON?
Design Verification Engineer
Verizon Logo

Verizon

Yokogawa Electric Logo

Yokogawa Electric

Nuro Logo

Nuro

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4 years ago
Technical
4 years ago
What's an example of a coverage point in your verification work, and how do you ensure its coverage?
Design Verification Engineer
Verizon Logo

Verizon

Prysmian Group Logo

Prysmian Group

FLIR Systems Logo

FLIR Systems

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4 years ago
Design
4 years ago
What methodology would you use to design a FSM utilizing switch-case or shift register?
Design Verification Engineer
Verizon Logo

Verizon

NEC Logo

NEC

Harley-Davidson Logo

Harley-Davidson

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4 years ago
Circuits
4 years ago
In terms of functionality, how do combinational circuits contrast with sequential circuits?
Design Verification Engineer
Verizon Logo

Verizon

Blue Origin Logo

Blue Origin

Xiaomi Logo

Xiaomi

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4 years ago
Behavioral
4 years ago
What is your strategy for dealing with a colleague who habitually arrives late?
Design Verification EngineerEmbedded Engineer
Verizon Logo

Verizon

Microchip Technology Logo

Microchip Technology

Xiaomi Logo

Xiaomi

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4 years ago

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*All interview questions are submitted by recent Verizon Design Verification Engineer candidates, labelled and categorized by Prepfully, and then published after being verified by Design Verification Engineers at Verizon.

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