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Behavioral

4 years ago

How do you plan to handle a recurring situation of a co-worker being late to meetings?

Design Verification EngineerEmbedded Engineer

SpaceX

Microchip Technology

Xiaomi

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4 years ago

Technical

4 years ago

Can you define the modulus of a counter and describe it for a decade counter?

Design Verification Engineer

SpaceX

Qualcomm

Microsoft

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4 years ago

Design

4 years ago

Can you expound on the concept of a clock tree and its criticality in VLSI design?

Design Verification Engineer

SpaceX

AT&T

SK Hynix

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4 years ago

Verilog Coding

4 years ago

Could you devise an SVA in System Verilog to confirm an input signal's compliance with setup and hold timings?

Design Verification Engineer

SpaceX

Mayo Clinic

Qualcomm

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4 years ago

Behavioral

4 years ago

How do you evaluate whether something is successful?

Design Verification EngineerEmbedded Engineer

SpaceX

Amazon

Synopsys

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4 years ago

Technical

4 years ago

In UVM, how does the 'new' method differ from the 'create' method?

Design Verification Engineer

SpaceX

Fujitsu

GlobalFoundries

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4 years ago

Circuits

4 years ago

How does a 10MHz square wave clock affect the output frequency of a JK flip-flop with J and K both set to zero?

Design Verification Engineer

SpaceX

Western Digital

Alstom

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4 years ago

Chip Design

4 years ago

Could you develop a sequence detector for recognizing a 101 pattern in serial bit streams?

Design Verification Engineer

SpaceX

Teradyne

OMRON

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4 years ago

Design

4 years ago

What is the role of Floorplanning in VLSI design?

Design Verification Engineer

SpaceX

AMD

Adobe

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4 years ago

Algorithms

4 years ago

Can you explain why Perl might be a better choice than other scripting languages?

Design Verification Engineer

SpaceX

Prysmian Group

FLIR Systems

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4 years ago

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