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Embedded Coding
3 years ago
In your own words, what does "switch and case" represent in programming?
Embedded Engineer

Seagate Technology

Nachi-Fujikoshi

Mitsubishi Electric Automation

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3 years ago
Behavioral
3 years ago
What insights did you gain from a substantial failure at work?
Embedded EngineerDesign Verification Engineer

Seagate Technology

Safran

IBM

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3 years ago
Technical
3 years ago
Can you describe the process to confirm the design's accuracy?
Design Verification Engineer

Seagate Technology

Polaris Industries Logo

Polaris Industries

Siemens Logo

Siemens

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3 years ago
Technical Knowledge
3 years ago
Regarding C++, how proficient and at ease are you?
Embedded Engineer

Seagate Technology

Tesla Logo

Tesla

Rohde & Schwarz Logo

Rohde & Schwarz

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3 years ago
Technical
3 years ago
Can you elaborate on the disparities between SystemVerilog assertions and UVM assertions?
Design Verification Engineer

Seagate Technology

Toshiba Logo

Toshiba

Trimble Logo

Trimble

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3 years ago
CircuitsDesign
3 years ago
In your process of designing a circuit with adders and gates, what factors do you take into account?
Design Verification Engineer

Seagate Technology

Amgen Logo

Amgen

ASUS Logo

ASUS

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3 years ago
Technical KnowledgeEmbedded Coding
3 years ago
How do you address memory fragmentation and garbage collection in embedded systems?
Embedded Engineer

Seagate Technology

Lenovo Logo

Lenovo

Crestron Logo

Crestron

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3 years ago
Technical
3 years ago
What techniques would you use to overcome setup and hold time violations?
Design Verification Engineer

Seagate Technology

Yamaha Motor Corporation Logo

Yamaha Motor Corporation

Pratt & Whitney Logo

Pratt & Whitney

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3 years ago
Verilog Coding
3 years ago
Can you demonstrate how to craft an SVA in System Verilog that blocks memory access during power-on-reset?
Design Verification Engineer

Seagate Technology

Xilinx Logo

Xilinx

Ericsson Logo

Ericsson

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3 years ago
Design
4 years ago
Please describe the workings of single port and multi-port SRAM/DRAM. What methods do you employ for optimal memory utilization and swift access times?
Design Verification Engineer

Seagate Technology

Harley-Davidson Logo

Harley-Davidson

ASUS Logo

ASUS

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4 years ago

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Product Strategy
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Seagate Technology

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Seagate Technology

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DS Analytical Execution

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*All interview questions are submitted by recent Seagate Technology candidates, labelled and categorized by Prepfully, and then published after verification by current and ex-Seagate Technology employees.

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