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Behavioral
3 years ago
Discuss a moment when prompt decision-making was crucial.
Design Verification EngineerEmbedded Engineer

Samsung Electronics

Philips

LG Electronics

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3 years ago
Behavioral
3 years ago
Could you share a personal attribute or experience not listed on your resume that you think is important?
Embedded EngineerDesign Verification Engineer

Samsung Electronics

Magneti Marelli

Lumentum

I believe my ability to integrate into a team is one of my strengths that didn’t show in my resume. This has been demonstrated through my diverse experiences in team-based activities, such as being part of a baseball team, participating in a robotics club, and serving as an English volunteer teacher.

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3 years ago
Technical
3 years ago
How is data managed and accessed in content addressable memory?
Design Verification Engineer

Samsung Electronics

Bombardier Logo

Bombardier

Analog Devices Logo

Analog Devices

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3 years ago
Technical
3 years ago
Can you share your experience with validation/prototype and synthesis, particularly your process in design projects?
Design Verification Engineer

Samsung Electronics

Juniper Networks Logo

Juniper Networks

ABB Logo

ABB

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3 years ago
Technical
3 years ago
Can you distinguish between formal verification and simulation-based verification?
Design Verification Engineer

Samsung Electronics

LG Electronics

Infineon Logo

Infineon

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3 years ago
Technical
3 years ago
What's your background in implementing and verifying arbitration logic, and what usual challenges do you encounter?
Design Verification Engineer

Samsung Electronics

Panasonic Logo

Panasonic

Leidos Logo

Leidos

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3 years ago
Behavioral
3 years ago
Share a conflict situation you've experienced and how you addressed it.
Embedded EngineerDesign Verification Engineer

Samsung Electronics

STMicroelectronics Logo

STMicroelectronics

Northrop Grumman Logo

Northrop Grumman

During one of our verification projects, we faced a challenge in defining the right test strategy for a new design block. I strongly advocated for merging an existing, previously verified block into a shared verification environment, believing it would improve efficiency and catch bugs with minimal effort. However, my teammate strongly advocated for a standalone block-level verification, arguing it would provide more deterministic coverage. This disagreement led to delays in testbench development and friction between us.

Recognizing the need for alignment, I initiated a structured discussion where we both presented our viewpoints with supporting data. I focused on ensuring we evaluated the trade-offs objectively rather than debating which approach was superior. After evaluating the pros and cons, I proposed a hybrid approach: conducting initial verification within the combined testbench for faster validation while simultaneously estimating the effort required for a standalone testbench. Once we mapped out our plans, we found that my approach led to a faster testbench setup, while his plan had overlaps in checker development. Recognizing this, we aligned on using the existing testbench while developing only the necessary new checkers. Later, we proposed building a dedicated block-level testbench to further improve coverage and verification confidence. This approach was well received by architects, designers, and management, as it balanced efficiency and thorough testing. It was a proud moment for me because it demonstrated the power of collaborative problem-solving, data-driven decision-making, and adaptability. This experience reinforced my belief that fostering open discussions, considering multiple perspectives, and focusing on practical solutions leads to stronger team synergy and better project outcomes.

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3 years ago
Design
3 years ago
What are the essential elements you consider when designing a priority encoder?
Design Verification Engineer

Samsung Electronics

Oppo Logo

Oppo

Synopsys Logo

Synopsys

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3 years ago
Behavioral
3 years ago
Can you describe an instance where your decision was unsuccessful and the lessons you drew from it?
Design Verification EngineerEmbedded Engineer

Samsung Electronics

NetApp Logo

NetApp

Marvell Logo

Marvell

In one of my previous roles, I was tasked with debugging a critical issue in a design verification testbench. The problem seemed minor initially, so I chose to focus on a quick fix without thoroughly analyzing the root cause. While the testbench passed some initial runs, the issue resurfaced in a different part of the design during integration, causing delays in the overall verification process.



This experience taught me the importance of addressing issues systematically rather than opting for quick fixes. Now, whenever I encounter a problem, I take the time to dig into the root cause, even if it requires additional effort upfront. This approach has significantly improved the reliability of my contributions and prevented similar issues from recurring in subsequent projects

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3 years ago
Design
4 years ago
How many and what types of pins are present in a TAP interface within a JTAG boundary scan?
Design Verification Engineer

Samsung Electronics

Belkin Logo

Belkin

Hitachi Logo

Hitachi

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4 years ago

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Samsung Electronics

Software Engineer

Prepare for Behavioral interview at Samsung Electronics

Behavioral
Samsung Electronics logo

Samsung Electronics

Product Manager

Prepare for Product Strategy interview at Samsung Electronics

Product Strategy
Samsung Electronics logo

Samsung Electronics

Engineering Manager

Prepare for System Design interview at Samsung Electronics

System Design
Samsung Electronics logo

Samsung Electronics

Data Scientist

Prepare for DS Analytical Execution interview at Samsung Electronics

DS Analytical Execution

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*All interview questions are submitted by recent Samsung Electronics candidates, labelled and categorized by Prepfully, and then published after verification by current and ex-Samsung Electronics employees.

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