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Technical
4 years ago
In the UVM driver class, what sets the get_next_item() method apart from the get() method?
Design Verification Engineer

Northrop Grumman

ABB

Dell

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4 years ago
Design
4 years ago
Could you detail the working principle of master/slave agents on a shared bus, with reference to AXI or analogous protocols, especially regarding data integrity and bus contention avoidance?
Design Verification Engineer

Northrop Grumman

Aurora

Teradyne

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4 years ago
Behavioral
4 years ago
Can you give an example of a time you had to bring someone around to your way of thinking? What methods did you use?
Design Verification EngineerEmbedded Engineer

Northrop Grumman

Amgen Logo

Amgen

Novartis Logo

Novartis

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4 years ago
Behavioral
4 years ago
Describe a project that holds a special place in your career and your reasons for valuing it.
Embedded EngineerDesign Verification Engineer

Northrop Grumman

HP Logo

HP

Rolls-Royce Aerospace Logo

Rolls-Royce Aerospace

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4 years ago
Technical Knowledge
4 years ago
Could you elaborate on what constitutes a “real time” system?
Embedded Engineer

Northrop Grumman

Mentor Graphics Logo

Mentor Graphics

Mouser Electronics Logo

Mouser Electronics

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4 years ago
Design
4 years ago
Can you illustrate the concept of Floorplanning in VLSI design?
Design Verification Engineer

Northrop Grumman

AMD Logo

AMD

Adobe Logo

Adobe

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4 years ago
Behavioral
4 years ago
Provide an example of a time when a fast decision was needed.
Embedded EngineerDesign Verification Engineer

Northrop Grumman

Philips Logo

Philips

LG Electronics Logo

LG Electronics

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4 years ago
Circuits
4 years ago
How is the output of a pulse generator with a 2-input NAND gate and input delays from inverters influenced by the input timing diagram?
Design Verification Engineer

Northrop Grumman

Lattice Semiconductor Logo

Lattice Semiconductor

Thermo Fisher Scientific Logo

Thermo Fisher Scientific

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4 years ago
Verilog Coding
4 years ago
Could you script an HDL FSM with three states (IDLE, READ, WRITE) that moves based on "op" input and cycles back to IDLE after 4 ticks?
Design Verification Engineer

Northrop Grumman

NXP Semiconductors Logo

NXP Semiconductors

NVIDIA Logo

NVIDIA

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4 years ago
Behavioral
4 years ago
What key skills do you possess that qualify you for this role?
Design Verification EngineerEmbedded Engineer

Northrop Grumman

Autodesk Logo

Autodesk

National Instruments Logo

National Instruments

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4 years ago

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*All interview questions are submitted by recent Northrop Grumman candidates, labelled and categorized by Prepfully, and then published after verification by current and ex-Northrop Grumman employees.

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