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Technical

8 months ago

What is clock domain crossing and what are the typical challenges it presents?

Design Verification Engineer

Lattice Semiconductor

Northrop Grumman

Western Digital

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8 months ago

Technical Knowledge

9 months ago

How would you describe the difference between a microcontroller and a microprocessor?

Embedded Engineer

Lattice Semiconductor

ZTE

Dell Technologies

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9 months ago

Behavioral

9 months ago

Can you talk about a past work challenge that you remember vividly?

Embedded EngineerDesign Verification Engineer

Lattice Semiconductor

Thermo Fisher Scientific

Juul Labs

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9 months ago

Technical

9 months ago

What are the key differences between soft and hard constraints in SystemVerilog?

Design Verification Engineer

Lattice Semiconductor

Canon

Microchip Technology

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9 months ago

Algorithms

9 months ago

Can you develop a C++ code snippet for generating a Fibonacci series?

Design Verification Engineer

Lattice Semiconductor

STMicroelectronics

Dell

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9 months ago

Behavioral

9 months ago

Tell me about a time you led a team.

Embedded EngineerDesign Verification Engineer

Lattice Semiconductor

Crestron

Sharp

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9 months ago

Circuits

9 months ago

With a 10MHz square wave as the clock and J=K=0, what output frequency does a JK flip-flop produce?

Design Verification Engineer

Lattice Semiconductor

Western Digital

Alstom

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9 months ago

Verilog Coding

10 months ago

Create Verilog code specifically for detecting positive and negative edges.

Design Verification Engineer

Lattice Semiconductor

AT&T

Medtronic

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10 months ago

Technical

10 months ago

Can you distinguish between a flip flop and a latch?

Design Verification Engineer

Lattice Semiconductor

Polaris Industries

Honeywell

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10 months ago

Technical

10 months ago

How would you define a Testbench in technical terms?

Design Verification Engineer

Lattice Semiconductor

Broadcom

Philips Healthcare

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10 months ago

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Lattice Semiconductor

Software Engineer

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Behavioral

Lattice Semiconductor

Product Manager

Prepare for Product Strategy interview at Lattice Semiconductor

Product Strategy

Lattice Semiconductor

Engineering Manager

Prepare for System Design interview at Lattice Semiconductor

System Design

Lattice Semiconductor

Data Scientist

Prepare for DS Analytical Execution interview at Lattice Semiconductor

DS Analytical Execution

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^*All interview questions are submitted by recent Lattice Semiconductor candidates, labelled and categorized by Prepfully, and then published after verification by current and ex-Lattice Semiconductor employees.