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Behavioral
8 months ago
Can you talk about a past work challenge that you remember vividly?
Embedded EngineerDesign Verification Engineer

Lattice Semiconductor

Thermo Fisher Scientific

Juul Labs

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8 months ago
Technical
8 months ago
What are the key differences between soft and hard constraints in SystemVerilog?
Design Verification Engineer

Lattice Semiconductor

Canon

Microchip Technology

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8 months ago
Algorithms
9 months ago
Can you develop a C++ code snippet for generating a Fibonacci series?
Design Verification Engineer

Lattice Semiconductor

STMicroelectronics Logo

STMicroelectronics

Dell Logo

Dell

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9 months ago
Behavioral
9 months ago
Tell me about a time you led a team.
Embedded EngineerDesign Verification Engineer

Lattice Semiconductor

Crestron Logo

Crestron

Sharp Logo

Sharp

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9 months ago
Circuits
9 months ago
With a 10MHz square wave as the clock and J=K=0, what output frequency does a JK flip-flop produce?
Design Verification Engineer

Lattice Semiconductor

Western Digital Logo

Western Digital

Alstom Logo

Alstom

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9 months ago
Verilog Coding
9 months ago
Create Verilog code specifically for detecting positive and negative edges.
Design Verification Engineer

Lattice Semiconductor

AT&T Logo

AT&T

Medtronic Logo

Medtronic

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9 months ago
Technical
9 months ago
Can you distinguish between a flip flop and a latch?
Design Verification Engineer

Lattice Semiconductor

Polaris Industries Logo

Polaris Industries

Honeywell Logo

Honeywell

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9 months ago
Technical
10 months ago
How would you define a Testbench in technical terms?
Design Verification Engineer

Lattice Semiconductor

Broadcom Logo

Broadcom

Philips Healthcare Logo

Philips Healthcare

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10 months ago
Verilog Coding
10 months ago
In System Verilog, what is your method for assuring through an SVA that memory read/write is off-limits during power-on-reset?
Design Verification Engineer

Lattice Semiconductor

Xilinx Logo

Xilinx

Ericsson Logo

Ericsson

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10 months ago
Behavioral
10 months ago
Discuss how you change your communication approach for maximum effectiveness.
Design Verification EngineerEmbedded Engineer

Lattice Semiconductor

BAE Systems Logo

BAE Systems

Microchip Technology

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10 months ago

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