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Verilog Coding
2 years ago
Can you create a Verilog snippet that initializes a 10x9 array with 0 at 0ns inside an initial block?
Design Verification Engineer

GE Aviation

Beckman Coulter

Bombardier Transportation

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2 years ago
Design
2 years ago
How would you compare custom cell design to standard cell design?
Design Verification Engineer

GE Aviation

Tesla

Bosch Logo

Bosch

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2 years ago
Design
2 years ago
Can you discuss your approach to designing interrupt controllers for various processors? How do you manage and prioritize multiple interrupt requests?
Design Verification Engineer

GE Aviation

Audi Logo

Audi

Hitachi Logo

Hitachi

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2 years ago
Behavioral
2 years ago
Can you highlight the skills that you believe make you an ideal candidate for this position?
Design Verification EngineerEmbedded Engineer

GE Aviation

Autodesk Logo

Autodesk

National Instruments Logo

National Instruments

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2 years ago
Technical
2 years ago
Can you describe how Immediate and Concurrent Assertions differ in SystemVerilog?
Design Verification Engineer

GE Aviation

Skyworks Solutions Logo

Skyworks Solutions

Eaton Logo

Eaton

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2 years ago
Chip Design
2 years ago
Design a detector that focuses on the sequence 101 within serial bit streams.
Design Verification Engineer

GE Aviation

Teradyne Logo

Teradyne

OMRON Logo

OMRON

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2 years ago
Technical
2 years ago
What methods would you use to ensure the design is correct?
Design Verification Engineer

GE Aviation

Polaris Industries Logo

Polaris Industries

Siemens Logo

Siemens

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2 years ago
Verilog Coding
2 years ago
Please explain the expected value of 'out' when 'a' is driven to “1’bx”.
Design Verification Engineer

GE Aviation

Eaton Logo

Eaton

Safran Logo

Safran

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2 years ago
Circuits
2 years ago
Could you demonstrate the assembly of a NAND gate using only 2:1 multiplexers?
Design Verification Engineer

GE Aviation

GlobalFoundries Logo

GlobalFoundries

Bombardier Transportation

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2 years ago
Behavioral
2 years ago
What methods do you employ to deal with your current work responsibilities?
Design Verification EngineerEmbedded Engineer

GE Aviation

Pratt & Whitney Logo

Pratt & Whitney

OMRON Logo

OMRON

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2 years ago

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*All interview questions are submitted by recent GE Aviation candidates, labelled and categorized by Prepfully, and then published after verification by current and ex-GE Aviation employees.

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