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Behavioral
a year ago
Could you tell us about a decision that didn't turn out as expected? What did you learn through that process?
Design Verification EngineerEmbedded Engineer
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Cypress Semiconductor

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NetApp

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Marvell

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a year ago
Technical
a year ago
What steps would you take to use fork-join parallelism for faster computation?
Design Verification Engineer
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Cypress Semiconductor

Dell Technologies Logo

Dell Technologies

OMRON Logo

OMRON

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a year ago
Verilog Coding
a year ago
Could you clarify what an event is and its relevance to Flipflops?
Design Verification Engineer
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Cypress Semiconductor

Nuvoton Technology Logo

Nuvoton Technology

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Huawei

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a year ago
AlgorithmsDesign
a year ago
In what manner would you approach the design of a bubble sort module that works in one cycle?
Design Verification Engineer
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Cypress Semiconductor

Nokia Logo

Nokia

STMicroelectronics Logo

STMicroelectronics

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a year ago
Technical
a year ago
Can you differentiate between the 'new' and 'create' methods in UVM?
Design Verification Engineer
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Cypress Semiconductor

Fujitsu Logo

Fujitsu

GlobalFoundries Logo

GlobalFoundries

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a year ago
Behavioral
a year ago
In your view, what constitutes successful outcomes?
Design Verification EngineerEmbedded Engineer
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Cypress Semiconductor

Amazon Logo

Amazon

Synopsys Logo

Synopsys

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a year ago
Behavioral
a year ago
Discuss a situation where meeting a deadline was challenging for you.
Design Verification Engineer
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Cypress Semiconductor

Aurora Logo

Aurora

Oracle Logo

Oracle

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a year ago
Technical
a year ago
Please elaborate on the objection mechanism in UVM and the process to terminate a test.
Design Verification Engineer
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Cypress Semiconductor

Bosch Logo

Bosch

Tesla Logo

Tesla

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a year ago
Technical
a year ago
What's the difference between Verilog's # directive and $timeformat directive?
Design Verification Engineer
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Cypress Semiconductor

Aurora Logo

Aurora

General Electric Logo

General Electric

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a year ago
Behavioral
a year ago
Tell us about a situation where you needed to make a quick judgment.
Design Verification EngineerEmbedded Engineer
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Cypress Semiconductor

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Philips

LG Electronics Logo

LG Electronics

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a year ago

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