Prepfully logo
  • Browse Coaches
  • Login
BetaTry Out Our New AI Mock Interviewer – Your Smartest Way to Ace Any Interview!Try Our AI Mock Interviewer
Try Now
NewRegister as a coach and get a $100 bonus on your first completed session if you're on the Prepfully Request for Coaches list.Coach $100 Bonus
Read More
LimitedEaster Deal: Heavy discounts on all Prepfully sessions.Easter Deal: Discounts
Book Now

Your AI Wingman for your next interview

The most comprehensive bank Interview Answer Review tooling available online.

Cutting-edge AI technology meets personalized feedback. Improve your interview answers with insightful guidance provided by a model trained against more than a million human-labelled interview answers.
  • Company rubrics
  • Role-level optimisations
  • Trained on 1mil+ answers
Design
3 years ago
How does the RTL design flow unfold step by step?
Design Verification Engineer

AMD

Microsoft

Hitachi

Get answer reviewed by AI
3 years ago
Technical
3 years ago
How do you intend to validate the operations of this ALU black box? Additionally, how would you transform it into a superscalar or pipelined unit for better performance?
Design Verification Engineer

AMD

Micron Technology

Mentor Graphics

Get answer reviewed by AI
3 years ago
Design
3 years ago
Could you elucidate on the operation of transceivers and arbiters? How do you safeguard data integrity and minimize power use?
Design Verification Engineer

AMD

Acer Logo

Acer

Samsung Electronics Logo

Samsung Electronics

Get answer reviewed by AI
3 years ago
Algorithms
3 years ago
What approach would you take to form two individual arrays, each holding 10 unique elements?
Design Verification Engineer

AMD

Autodesk Logo

Autodesk

TP-Link Logo

TP-Link

Get answer reviewed by AI
3 years ago
Design
3 years ago
In VLSI design, how crucial is a clock tree and what does it accomplish?
Design Verification Engineer

AMD

AT&T Logo

AT&T

SK Hynix Logo

SK Hynix

Get answer reviewed by AI
3 years ago
Circuits
3 years ago
For a JK flip-flop fed with a 10MHz square wave and J=K=0, what would the output frequency be?
Design Verification Engineer

AMD

Western Digital Logo

Western Digital

Alstom Logo

Alstom

Get answer reviewed by AI
3 years ago
Algorithms
3 years ago
Could you demonstrate how you would implement an LRU cache policy in C++?
Design Verification Engineer

AMD

Fujitsu Logo

Fujitsu

Tesla Logo

Tesla

Get answer reviewed by AI
3 years ago
Design
3 years ago
Can you describe the concept of parasitic resistance and its relevance in VLSI design?
Design Verification Engineer

AMD

NXP Semiconductors Logo

NXP Semiconductors

Prysmian Group Logo

Prysmian Group

Get answer reviewed by AI
3 years ago
Circuits
3 years ago
Could you delineate the differences between positive and negative edge-triggered flip-flops?
Design Verification Engineer

AMD

Xilinx Logo

Xilinx

Peloton Logo

Peloton

Get answer reviewed by AI
3 years ago
Design
3 years ago
Please elucidate on bit manipulation and provide a practical example from your past experience.
Design Verification Engineer

AMD

Silicon Labs Logo

Silicon Labs

AT&T Logo

AT&T

Get answer reviewed by AI
3 years ago

Try Free AI Interview

Question of the week

We'll send you a weekly question to practice for:

Showing 151 to 160 of 207 results

Previous1415161718Next

*All interview questions are submitted by recent AMD Design Verification Engineer candidates, labelled and categorized by Prepfully, and then published after being verified by Design Verification Engineers at AMD.

  • AWS Technical Program Manager interview guide
  • Cruise Technical Program Manager Interview Guide
  • PayPal Technical Product Manager
  • Microsoft Technical Program Manager Interview Guide
  • Technical Program Manager Interview Guide
  • Uber Data Scientist Interview Guide
  • Company
  • FAQs
  • Contact Us
  • Become An Expert
  • Services
  • Practice Interviews
  • Interview Guides
  • Interview Questions
  • Watch Recorded Interviews
  • Gift sessions
  • AI Interview
  • Social
  • Twitter
  • Facebook
  • LinkedIn
  • YouTube
  • Legal
  • Terms & Conditions
  • Privacy Policy
  • Illustrations by Storyset

© 2025 Prepfully. All rights reserved.

Prepfully logo

Please log in to view more questions.

Not a member yet? Sign up for free.