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Technical

3 years ago

What makes UVM a preferred method in design verification?

Design Verification Engineer

Agilent Technologies

Xilinx

Microsoft

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3 years ago

Technical

3 years ago

Could you clarify the role of a cache in a system and how it operates?

Design Verification Engineer

Agilent Technologies

Garmin

Keysight Technologies

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3 years ago

Technical KnowledgeEmbedded Coding

3 years ago

What are your preferred methods for accessing and tweaking microcontroller registers in C?

Embedded Engineer

Agilent Technologies

Siemens

Qualcomm

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3 years ago

Technical

3 years ago

In what case was a virtual interface in SystemVerilog instrumental in achieving successful design verification?

Design Verification Engineer

Agilent Technologies

Novartis

GlobalFoundries

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3 years ago

Circuits

3 years ago

What frequency can be expected at the output of a JK flip-flop with J=K=0 and a clock frequency of 10MHz?

Design Verification Engineer

Agilent Technologies

Western Digital

Alstom

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3 years ago

Embedded CodingTechnical Knowledge

3 years ago

How do you configure and utilize interrupt priority levels in embedded C code?

Embedded Engineer

Agilent Technologies

National Instruments

Nokia

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3 years ago

Technical KnowledgeEmbedded System Design

3 years ago

What are your preferred methods for reducing interrupt latency in systems?

Embedded Engineer

Agilent Technologies

Mitsubishi Electric Automation

Digi-Key Electronics

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3 years ago

Technical

3 years ago

Can you clarify the difference between positive edge and negative edge triggering in Verilog?

Design Verification Engineer

Agilent Technologies

Boston Scientific

Teradyne

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3 years ago

Behavioral

3 years ago

Tell us about a time you went against the grain with your decision.

Design Verification EngineerEmbedded Engineer

Agilent Technologies

Philips Healthcare

NetApp

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3 years ago

Verilog Coding

3 years ago

In System Verilog, what's your method for assuring through an SVA that a signal climbs from 0 to 1 before another signal drops from 1 to 0?

Design Verification Engineer

Agilent Technologies

Kawasaki Heavy Industries

Philips Healthcare

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3 years ago

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Software Engineer

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Agilent Technologies

Product Manager

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Product Strategy

Agilent Technologies

Engineering Manager

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System Design

Agilent Technologies

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^*All interview questions are submitted by recent Agilent Technologies candidates, labelled and categorized by Prepfully, and then published after verification by current and ex-Agilent Technologies employees.