Anonymous
For postive edge triggering the signal changes whenever it changes from low to high and for negative edge triggering the signal changes whenever it changes from high to low
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Prepare for success with realistic, role-specific interview simulations.
Try AI Interview NowInterview question asked to Design Verification Engineers interviewing at Continental, Amgen, Sony and others: Could you explain the difference between positive edge triggering and negative edge triggering in Verilog?.